Description

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The multicore revolution has reached the deployment stage in embedded systems ranging from small ultramobile devices to large telecommunication servers. The transition from single to multicore processors, motivated by the need to increase performance while conserving power, has placed great responsibility on the shoulders of software engineers. In this new embedded multicore era, the toughest task is the development of code to support more sophisticated systems. This book provides embedded engineers with solid grounding in the skills required to develop software targeting multicore processors. Within the text, the author undertakes an in-depth exploration of performance analysis, and a close-up look at the tools of the trade. Both general multicore design principles and processor-specific optimization techniques are revealed. Detailed coverage of critical issues for multicore employment within embedded systems is provided, including the Threading Development Cycle, with discussions of analysis, design, development, debugging, and performance tuning of threaded applications. Software development techniques engendering optimal mobility and energy efficiency are highlighted through multiple case studies, which provide practical "how-to" advice on implementing the latest multicore processors. Finally, future trends are discussed, including terascale, speculative multithreading, transactional memory, interconnects, and the software-specific implications of these looming architectural developments.

Table of Contents
Chapter 1 - Introduction
Chapter 2 - Basic System and Processor Architecture
Chapter 3 - Multi-core Processors & Embedded
Chapter 4 -Moving To Multi-core Intel Architecture
Chapter 5 - Scalar Optimization & Usability
Chapter 6 - Parallel Optimization Using Threads
Chapter 7 - Case Study: Data Decomposition
Chapter 8 - Case Study: Functional Decomposition
Chapter 9 - Virtualization & Partitioning
Chapter 10 - Getting Ready For Low Power Intel Architecture
Chapter 11 - Summary, Trends, and Conclusions
Appendix I
Glossary
References.